Minimizing Design Cycles for Maximum Profitability
Mercury offers many robust IP cores, covering a wide range of applications. Our current generation of IP cores hasbeen developed after years of proven performance after system implementations. Future generations of our IP cores can be trusted to provide the same level of performance and reliability that our customers have come to expect.
Our high-performance verification IP can be used as a vendor-agnostic test aid, making it easier for designers to add new components and IP. What's more, Mercury's open standards-based FPGA Developer’s Kit (OpenFDK) makes customizing and optimizing designs and algorithms faster. OpenFDK also produces higher quality results and shorter development cycles. And our Protocol Offload Engine Technology (POET) allows the interconnection of Intel® processors via a high-speed, low-latency data plane in an embedded subsystem.
Mercury’s EchoCore DSP IP cores perform a variety of functions at “streaming” data rates. These perform basic signal selection and filtering functions, but additional processing such as pulse generation, pulse compression, pulse deramping, more specific filtering, spectral analysis, etc., can be incorporated as well. Also, mixing and matching of the existing IP can produce some useful capabilities, such as a channelized IF downconversion, through the combination of a block downconverter and a polyphase channelizer.
- FPGA Hardware
- IP Products
- Accelerating FPGA Design and Integration by:
- Standardizing interfaces for interoperability and reuse
- Accelerating system integration
- Optimizing for embedded design
- Design reliability and verification
- Customizing OpenFDK to fit your system